Uarti2cspi2_reg

Macros
#define	UARTI2CSPI2_REG_RHR   0x00
	UART I2C SPI 2 register list.
#define	UARTI2CSPI2_REG_THR   0x00
#define	UARTI2CSPI2_REG_IRQEN   0x01
#define	UARTI2CSPI2_REG_IRQSTS   0x02
#define	UARTI2CSPI2_REG_LSR_IRQEN   0x03
#define	UARTI2CSPI2_REG_LSR_IRQSTS   0x04
#define	UARTI2CSPI2_REG_SPCHR_IRQEN   0x05
#define	UARTI2CSPI2_REG_SPCHR_IRQSTS   0x06
#define	UARTI2CSPI2_REG_STS_IRQEN   0x07
#define	UARTI2CSPI2_REG_STS_IRQSTS   0x08
#define	UARTI2CSPI2_REG_MODE1   0x09
#define	UARTI2CSPI2_REG_MODE2   0x0A
#define	UARTI2CSPI2_REG_LCR   0x0B
#define	UARTI2CSPI2_REG_RXTO   0x0C
#define	UARTI2CSPI2_REG_HDPIXDELAY   0x0D
#define	UARTI2CSPI2_REG_IRDA   0x0E
#define	UARTI2CSPI2_REG_FLOWLVL   0x0F
#define	UARTI2CSPI2_REG_FIFOTRIGLVL   0x10
#define	UARTI2CSPI2_REG_TXFIFOLVL   0x11
#define	UARTI2CSPI2_REG_RXFIFOLVL   0x12
#define	UARTI2CSPI2_REG_FLOWCTRL   0x13
#define	UARTI2CSPI2_REG_XON1   0x14
#define	UARTI2CSPI2_REG_XON2   0x15
#define	UARTI2CSPI2_REG_XOFF1   0x16
#define	UARTI2CSPI2_REG_XOFF2   0x17
#define	UARTI2CSPI2_REG_GPIOCFG   0x18
#define	UARTI2CSPI2_REG_GPIODATA   0x19
#define	UARTI2CSPI2_REG_PLLCFG   0x1A
#define	UARTI2CSPI2_REG_BRGCFG   0x1B
#define	UARTI2CSPI2_REG_BRGDIVLSB   0x1C
#define	UARTI2CSPI2_REG_BRGDIVMSB   0x1D
#define	UARTI2CSPI2_REG_CLKSRC   0x1E
#define	UARTI2CSPI2_REG_GLOBAL_IRQ   0x1F
#define	UARTI2CSPI2_REG_GLOBAL_CMD   0x1F
#define	UARTI2CSPI2_REG_TXSYNCH   0x20
#define	UARTI2CSPI2_REG_SYNCHDELAY1   0x21
#define	UARTI2CSPI2_REG_SYNCHDELAY2   0x22
#define	UARTI2CSPI2_REG_TIMER1   0x23
#define	UARTI2CSPI2_REG_TIMER2   0x24
#define	UARTI2CSPI2_REG_REVID   0x25

Detailed Description

Macro Definition Documentation

UARTI2CSPI2_REG_BRGCFG

#define UARTI2CSPI2_REG_BRGCFG   0x1B

UARTI2CSPI2_REG_BRGDIVLSB

#define UARTI2CSPI2_REG_BRGDIVLSB   0x1C

UARTI2CSPI2_REG_BRGDIVMSB

#define UARTI2CSPI2_REG_BRGDIVMSB   0x1D

UARTI2CSPI2_REG_CLKSRC

#define UARTI2CSPI2_REG_CLKSRC   0x1E

UARTI2CSPI2_REG_FIFOTRIGLVL

#define UARTI2CSPI2_REG_FIFOTRIGLVL   0x10

UARTI2CSPI2_REG_FLOWCTRL

#define UARTI2CSPI2_REG_FLOWCTRL   0x13

UARTI2CSPI2_REG_FLOWLVL

#define UARTI2CSPI2_REG_FLOWLVL   0x0F

UARTI2CSPI2_REG_GLOBAL_CMD

#define UARTI2CSPI2_REG_GLOBAL_CMD   0x1F

UARTI2CSPI2_REG_GLOBAL_IRQ

#define UARTI2CSPI2_REG_GLOBAL_IRQ   0x1F

UARTI2CSPI2_REG_GPIOCFG

#define UARTI2CSPI2_REG_GPIOCFG   0x18

UARTI2CSPI2_REG_GPIODATA

#define UARTI2CSPI2_REG_GPIODATA   0x19

UARTI2CSPI2_REG_HDPIXDELAY

#define UARTI2CSPI2_REG_HDPIXDELAY   0x0D

UARTI2CSPI2_REG_IRDA

#define UARTI2CSPI2_REG_IRDA   0x0E

UARTI2CSPI2_REG_IRQEN

#define UARTI2CSPI2_REG_IRQEN   0x01

UARTI2CSPI2_REG_IRQSTS

#define UARTI2CSPI2_REG_IRQSTS   0x02

UARTI2CSPI2_REG_LCR

#define UARTI2CSPI2_REG_LCR   0x0B

UARTI2CSPI2_REG_LSR_IRQEN

#define UARTI2CSPI2_REG_LSR_IRQEN   0x03

UARTI2CSPI2_REG_LSR_IRQSTS

#define UARTI2CSPI2_REG_LSR_IRQSTS   0x04

UARTI2CSPI2_REG_MODE1

#define UARTI2CSPI2_REG_MODE1   0x09

UARTI2CSPI2_REG_MODE2

#define UARTI2CSPI2_REG_MODE2   0x0A

UARTI2CSPI2_REG_PLLCFG

#define UARTI2CSPI2_REG_PLLCFG   0x1A

UARTI2CSPI2_REG_REVID

#define UARTI2CSPI2_REG_REVID   0x25

UARTI2CSPI2_REG_RHR

#define UARTI2CSPI2_REG_RHR   0x00

UART I2C SPI 2 register list.

Specified register list of UART I2C SPI 2 Click driver.

UARTI2CSPI2_REG_RXFIFOLVL

#define UARTI2CSPI2_REG_RXFIFOLVL   0x12

UARTI2CSPI2_REG_RXTO

#define UARTI2CSPI2_REG_RXTO   0x0C

UARTI2CSPI2_REG_SPCHR_IRQEN

#define UARTI2CSPI2_REG_SPCHR_IRQEN   0x05

UARTI2CSPI2_REG_SPCHR_IRQSTS

#define UARTI2CSPI2_REG_SPCHR_IRQSTS   0x06

UARTI2CSPI2_REG_STS_IRQEN

#define UARTI2CSPI2_REG_STS_IRQEN   0x07

UARTI2CSPI2_REG_STS_IRQSTS

#define UARTI2CSPI2_REG_STS_IRQSTS   0x08

UARTI2CSPI2_REG_SYNCHDELAY1

#define UARTI2CSPI2_REG_SYNCHDELAY1   0x21

UARTI2CSPI2_REG_SYNCHDELAY2

#define UARTI2CSPI2_REG_SYNCHDELAY2   0x22

UARTI2CSPI2_REG_THR

#define UARTI2CSPI2_REG_THR   0x00

UARTI2CSPI2_REG_TIMER1

#define UARTI2CSPI2_REG_TIMER1   0x23

UARTI2CSPI2_REG_TIMER2

#define UARTI2CSPI2_REG_TIMER2   0x24

UARTI2CSPI2_REG_TXFIFOLVL

#define UARTI2CSPI2_REG_TXFIFOLVL   0x11

UARTI2CSPI2_REG_TXSYNCH

#define UARTI2CSPI2_REG_TXSYNCH   0x20

UARTI2CSPI2_REG_XOFF1

#define UARTI2CSPI2_REG_XOFF1   0x16

UARTI2CSPI2_REG_XOFF2

#define UARTI2CSPI2_REG_XOFF2   0x17

UARTI2CSPI2_REG_XON1

#define UARTI2CSPI2_REG_XON1   0x14

UARTI2CSPI2_REG_XON2

#define UARTI2CSPI2_REG_XON2   0x15